PyTorch 需 2.4+ 且推荐用最新版;Linux 需 glibc >= 2.24;macOS 上 8-bit 优化器在 MPS 后端仍为计划中,部分标记功能性能优化不足
bitsandbytes
bitsandbytes-foundationMIT活跃维护让大模型在普通显卡上跑起来的 PyTorch 量化库,支持 8-bit 和 4-bit 权重压缩,也是 QLoRA 微调背后的核心依赖。
Accessible large language models via k-bit quantization for PyTorch.
pip install bitsandbytes需 Python 3.10+ 和 PyTorch 2.4+。CPU 需 AVX2(推荐 AVX512F/AVX512BF16);NVIDIA GPU 最低 SM60、推荐 SM75+;另支持 AMD(CDNA/RDNA 系列)、Intel GPU(Max/Arc A/B 系列)、Intel Gaudi2/3,以及 macOS 14+ 的 Apple M1+(CPU 与 MPS)。README 未给出具体显存数值。
PyTorch 的 k-bit 量化库,用 8-bit 优化器、LLM.int8() 和 QLoRA 大幅降低大模型显存占用
让大模型在普通显卡上跑起来的 PyTorch 量化库,支持 8-bit 和 4-bit 权重压缩,也是 QLoRA 微调背后的核心依赖。
核心能力
- 用分块量化实现 8-bit 优化器,显存远低于 32-bit 且保持性能
- LLM.int8() 用向量级量化加 16-bit 离群值处理,推理显存减半
- QLoRA 将模型量化到 4-bit 并插入 LoRA 权重以低显存训练
- 提供 Linear8bitLt、Linear4bit 量化层与 bitsandbytes.optim 优化器模块
容易踩的坑
用户点评
登录用户的真实使用记录,可按版本和硬件筛选还没有人点评。第一个说出真实体验的人最有价值。
- continuous-release_mainLatest `main` wheelpre-release2026-10-27 · 2026-10-27 21:28 UTC
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Latest
mainpre-release wheelThis pre-release contains the latest development wheels for all supported platforms, rebuilt automatically on every commit to the
mainbranch.How to install: Pick the correct command for your platform and run it in your terminal:
macOS 14+ (arm64)
pip install --force-reinstall https://github.com/bitsandbytes-foundation/bitsandbytes/releases/download/continuous-release_main/bitsandbytes-1.33.7.preview-py3-none-macosx_14_0_arm64.whlLinux (aarch64)
pip install --force-reinstall https://github.com/bitsandbytes-foundation/bitsandbytes/releases/download/continuous-release_main/bitsandbytes-1.33.7.preview-py3-none-manylinux_2_24_aarch64.whlLinux (x86_64)
pip install --force-reinstall https://github.com/bitsandbytes-foundation/bitsandbytes/releases/download/continuous-release_main/bitsandbytes-1.33.7.preview-py3-none-manylinux_2_24_x86_64.whlWindows (x86_64)
pip install --force-reinstall https://github.com/bitsandbytes-foundation/bitsandbytes/releases/download/continuous-release_main/bitsandbytes-1.33.7.preview-py3-none-win_amd64.whlWindows (arm64)
pip install --force-reinstall https://github.com/bitsandbytes-foundation/bitsandbytes/releases/download/continuous-release_main/bitsandbytes-1.33.7.preview-py3-none-win_arm64.whlCustom PyTorch builds (Intel XPU, ROCm, etc.): The
--force-reinstallflag causes pip to re-resolve all dependencies from PyPI, which may replace your custom PyTorch build with the default CUDA variant. To avoid this, add--no-deps:pip install --force-reinstall --no-deps https://github.com/bitsandbytes-foundation/bitsandbytes/releases/download/continuous-release_main/bitsandbytes-1.33.7.preview-py3-none-manylinux_2_24_x86_64.whlNote: These wheels are updated automatically with every commit to
mainand become available as soon as the python-package.yml workflow finishes.The version number is replaced with 1.33.7-preview in order to keep the link stable, this however does not affect the installed version at all:
> pip install https://.../bitsandbytes-1.33.7-preview-py3-none-manylinux_2_24_x86_64.whl Collecting bitsandbytes==1.33.7rc0 ... Successfully installed bitsandbytes-0.49.0.dev0 - 0.50.2最新正式版2026-08-27 · 2026-08-27 00:13 UTC
Highlights
- ROCm 10.0 build is now included for both Linux and Windows.
- Additional AMD GPU targets are included in our prebuilt wheels.
- Performance improvement for certain 4bit GEMM shapes on NVIDIA GB10.
What's Changed
- Mask the absmax store in the Triton 4-bit quantize kernels by @truong-v in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/2043
- Add sm121 (GB10) to the wide_n_simt 4-bit GEMM dispatch rule by @yashb98 in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/2039
- chore(deps): bump the actions group across 1 directory with 2 updates by @dependabot[bot] in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/2036
- [ROCm] Harden HIP version for native library naming and selection by @sstamenk in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/1888
- Revert "[ROCm] Harden HIP version for native library naming and selection" by @matthewdouglas in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/2060
- [ROCm] Restore Wave64 warp size for all gfx9 targets by @0xDELUXA in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/2059
- ci: expand ROCm architecture coverage by @sstamenk in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/2046
- [ROCm] Add CI for ROCm 10.0 by @sstamenk in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/2061
New Contributors
- @truong-v made their first contribution in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/2043
- @0xDELUXA made their first contribution in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/2059
Full Changelog: https://github.com/bitsandbytes-foundation/bitsandbytes/compare/0.50.1...0.50.2
- 0.50.10.50.1: RTX Spark Support2026-08-13 · 2026-08-13 17:19 UTC
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This release adds support for additional hardware platforms and improves performance on RTX Spark / DGX Spark.
Highlights
- Support added for NVIDIA RTX Spark products running Windows on ARM64 (#2038, #2037, #2032)
- Improved 4bit GEMM dispatch heuristics for NVIDIA GB10 (#2030)
- Support for AMD CDNA5 hardware (e.g. MI455X)
What's Changed
- Add ROCm CDNA5 (gfx1250) support by @zjin-lcf in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/2023
- chore(deps): bump the actions group with 3 updates by @dependabot[bot] in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/2022
- Update README by @matthewdouglas in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/2024
- Fix truncated FP4 constant in Triton dequantize_fp4_tree by @Anai-Guo in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/2026
- docs: add installation instructions for NVIDIA Spark (ARM64) devices by @mfuntowicz in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/2037
- fix: missing compilation flag on recent msvc version by @mfuntowicz in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/2032
- build: Add Windows ARM64 build with CUDA 13.4 for RTX Spark by @matthewdouglas in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/2038
- Add sm121 (GB10) tier to the 4-bit GEMM dispatch heuristic by @yashb98 in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/2030
New Contributors
- @zjin-lcf made their first contribution in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/2023
- @Anai-Guo made their first contribution in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/2026
- @yashb98 made their first contribution in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/2030
Full Changelog: https://github.com/bitsandbytes-foundation/bitsandbytes/compare/0.50.0...0.50.1
- 0.50.00.50.0: Faster 4-bit inference, CPU/ROCm/Apple Silicon improvements, and more!2026-07-25 · 2026-07-25 01:42 UTC
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This release brings a new fused 4-bit GEMM for inference on CUDA and ROCm, faster CPU ops on x86-64 and ARM64, reduced host-side overhead, and a much improved Apple Silicon backend. We've also added Windows on ARM CPU support, ROCm builds for Windows, additional ROCm and CUDA build variants, and new optimizer support on CPU and Intel XPU.
Highlights
🚀 New 4-bit GEMM kernels for inference (CUDA)
New fused 4-bit dequantize + GEMM kernels replace the old GEMV and
dequantize + F.linearpaths for small-to-medium batch sizes. 4-bit inference is up to 4x faster at batch sizes of 2 through 64 across Turing through Blackwell, with wins at batch size 1 in many cases too. Nested (double) quantization and bias are fused in as well, so nested quant sees an additional benefit. Kernel selection happens automatically at runtime based on shape, GPU architecture, and SM count. See #1949 for benchmarks and details.🚀 Fused 4-bit SIMT GEMM on ROCm
The SIMT version of the new 4-bit GEMM has been ported to ROCm and wired into the same dispatch for small inference batches, validated on gfx1100, gfx1201, and gfx1151 (#1979).
AMD ROCm improvements
Stability and performance improvements bring AMD ROCm support out of preview; it is now considered stable.
- ROCm wheels for Windows are now published for ROCm 7.2 and 7.14 (#1915, #2007).
- Added ROCm 7.14 and dropped the ROCm 6.2 and 6.3 builds (#2007).
- Expanded GPU target coverage to add RDNA2 consumer GPUs, additional RDNA3 and RDNA3.5 GPUs, and CDNA1 (gfx908) data center GPUs (#1886, #2007).
Apple Silicon (MPS)
Apple Silicon support is improved. The MPS backend added optimized Metal kernels from the Hub (#1875) and was substantially improved (#1960, #1983, #1994) so that all 4-bit and LLM.int8() configurations now work on MPS. On macOS 26+, install the
kernelspackage for the best performance, which enables the optimized Metal kernels; otherwise a naive fallback is used. The MPS path requires torch >= 2.9.The last remaining feature for support parity is the 8bit optimizers, which will land in a future release.
CPU performance on x86-64 and ARM64
Blockwise quantization and dequantization on CPU are considerably faster, mostly from better SIMD usage plus some compile flag tuning. Improvements range from 1.1x to over 20x depending on op, dtype, and hardware, with the largest gains on fp16 and on x86-64 CPUs without AVX-512. The LLM.int8() matmul on CPU was improved as well. See #1968 for benchmarks.
Reduced host-side CPU overhead
Reduced Python dispatch overhead, especially on the CUDA/ROCm backend (#1953).
Windows on ARM CPU support
Windows ARM64 CPU wheels are now built with NEON-optimized kernels (#1959), with nightly test coverage added (#1962).
New optimizer support
- CPU optimizers are now supported for both 32-bit and 8-bit blockwise (#1901).
- Intel XPU gained paged optimizer support (#1898) and support for the LARS and LAMB optimizers (#1902).
- Fixed Lion to use decoupled weight decay (#1993, #2001).
- Other optimizer fixes (#1869, #1998, #1855).
NVIDIA CUDA
- Added CUDA 13.2 build wheels and nightly test coverage (#1925).
- Smaller wheels: reduced the CUDA build matrix and added a closest-version fallback for library loading (#1980).
Intel XPU
- Added a oneAPI 2026 build; wheels now package both the 2025 and 2026 variants and pick the right one at runtime based on the PyTorch XPU version (#2002).
- Fixed
gemv_4bitbf16 correctness on Intel Arc A-series (Alchemist) GPUs (#1942).
🚨 Breaking Changes
- Minimum PyTorch version is now 2.4 (#1926).
- Removed deprecated APIs: the
researchmodule, non-blockwise (block_wise=False) optimizers, and legacy dynamic quantization functions, along with their CUDA/HIP kernels (#1871, #1880). - Removed legacy sparse functionality (
spmm_coo,spmm_coo_very_sparse) and dropped the cusparse/hipsparse dependencies (#1881).
Deprecations
- 0.49.22026-02-16 · 2026-02-16 21:29 UTC
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Highlights
- The default blocksize of 64 for 4bit quantization is now supported on ROCm. Previously the default was 128, which was a mismatch from the default for other devices.
- ROCm 7.2 build is now included.
What's Changed
- bug: fix 8bitoptim support with fsdp by @ved1beta in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/1840
- Fix xpu 4bit kernel by @jiqing-feng in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/1839
- ROCm 7.2 build and doc changes by @sstamenk in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/1845
- Add CUDA kernel support for 4-bit quantization with blocksize=32 by @Abdennacer-Badaoui in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/1854
- Add blocksize=64 4-bit quantization support for ROCm CDNA (warp64) GPUs by @Abdennacer-Badaoui in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/1856
- [Docs Update] QLoRA 4-bit Support on ROCm by @Abdennacer-Badaoui in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/1857
- [ROCm] Make blocksize=64 default for 4bit by @matthewdouglas in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/1873
- Handle non-contiguous tensors in quantize/dequantize ops by @TimDettmers in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/1859
- Fix AdEMAMix scheduler guard and add state_dict round-trip test by @TimDettmers in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/1861
New Contributors
- @Abdennacer-Badaoui made their first contribution in https://github.com/bitsandbytes-foundation/bitsandbytes/pull/1854
Full Changelog: https://github.com/bitsandbytes-foundation/bitsandbytes/compare/0.49.1...0.49.2
bitsandbytes enables accessible large language models via k-bit quantization for PyTorch. We provide three main features for dramatically reducing memory consumption for inference and training:
- 8-bit optimizers uses block-wise quantization to maintain 32-bit performance at a small fraction of the memory cost.
- LLM.int8() or 8-bit quantization enables large language model inference with only half the required memory and without any performance degradation. This method is based on vector-wise quantization to quantize most features to 8-bits and separately treating outliers with 16-bit matrix multiplication.
- QLoRA or 4-bit quantization enables large language model training with several memory-saving techniques that don't compromise performance. This method quantizes a model to 4-bits and inserts a small set of trainable low-rank adaptation (LoRA) weights to allow training.
The library includes quantization primitives for 8-bit & 4-bit operations, through bitsandbytes.nn.Linear8bitLt and bitsandbytes.nn.Linear4bit and 8-bit optimizers through bitsandbytes.optim module.
System Requirements
bitsandbytes has the following minimum requirements for all platforms:
- Python 3.10+
- PyTorch 2.4+
- Note: While we aim to provide wide backwards compatibility, we recommend using the latest version of PyTorch for the best experience.
Accelerator support:
Note: this table reflects the status of the current development branch. For the latest stable release, see the document in the 0.50.0 tag.
Legend:
🚧 = Planned | 〰️ = Partially Supported | ✅ = Supported | ❌ = Not Supported
:book: Documentation
:heart: Sponsors
The continued maintenance and development of bitsandbytes is made possible thanks to the generous support of our sponsors. Their contributions help ensure that we can keep improving the project and delivering valuable updates to the community.
License
bitsandbytes is MIT licensed.
How to cite us
If you found this library useful, please consider citing our work:
QLoRA
@article{dettmers2023qlora,
title={Qlora: Efficient finetuning of quantized llms},
author={Dettmers, Tim and Pagnoni, Artidoro and Holtzman, Ari and Zettlemoyer, Luke},
journal={arXiv preprint arXiv:2305.14314},
year={2023}
}
LLM.int8()
@article{dettmers2022llmint8,
title={LLM.int8(): 8-bit Matrix Multiplication for Transformers at Scale},
author={Dettmers, Tim and Lewis, Mike and Belkada, Younes and Zettlemoyer, Luke},
journal={arXiv preprint arXiv:2208.07339},
year={2022}
}
8-bit Optimizers
@article{dettmers2022optimizers,
title={8-bit Optimizers via Block-wise Quantization},
author={Dettmers, Tim and Lewis, Mike and Shleifer, Sam and Zettlemoyer, Luke},
journal={9th International Conference on Learning Representations, ICLR},
year={2022}
}